Field of Invention
Exemplary embodiments of the present invention relate to an apparatus of semiconductor memory storage system, and more particularly to diagnose SSD and an operation method thereof.
Description of Related Arts
The computer environment paradigm has shifted to ubiquitous computing systems that can be used anytime and anywhere. Due to this fact, the use of portable electronic devices such as mobile phones, digital cameras, and notebook computers has rapidly increased. These portable electronic devices generally use a memory system having memory devices, that is, a data storage device. The data storage device is used as a main memory device or an auxiliary memory device of the portable electronic devices. Thus, the reliability and security of digital data storage, such as a memory system, is critical.
Data storage devices using memory devices provide excellent stability, durability, high information access speed, and low power consumption, since they have no moving parts. Examples of data storage devices having such advantages include universal serial bus (USB) memory devices, memory cards having various interfaces, and solid state drives (SSD).
The SSD can include various flash memory components. The two main types of flash memory components are named after the NAND and NOR logic gates. The individual flash memory cells exhibit internal characteristics similar to those of the corresponding gates. The NAND-type flash memory may be written and read in blocks (or pages) which are generally much smaller than the entire device. The NAND-type operates primarily in memory cards, USB flash drives, solid-state drives, and similar products, for general storage and transfer of data.
Optimized SSD read I/O latency distribution is always a very important component of the all flash array. Optimized SSD read I/O latency distribution is particularly crucial and needs to be accomplished for Linux kernel in Non-Volatile Memory Express (NVMe) SSD device drivers.
Thus, there remains a need for a semiconductor memory system and operating method thereof having latency optimization mechanism. In view of the ever-increasing need to improve performance, it is more and more critical that answers be found to these problems. Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.